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ds07-12555-1ea fujitsu microelectronics data sheet copyright?2002-2008 fujitsu microelect ronics limited all rights reserved 2002.8 8-bit proprietary microcontroller cmos f 2 mc-8l mb89560a series mb89567a/567ac/p568/pv560 description the mb89560a series has been developed as a general-purpose version of the f 2 mc* 1 -8l family consisting of proprietary 8-bit, single-chip microcontrollers. in addition to a compact instruction set, the microcontro ller contains a variety of peripheral functions such as i 2 c interface* 2 , timers, 2 ch 8-bit pwm timers, 8/16-bit timer, 21-bit timebase timer, 8-bit pwc timer, 17-bit watch prescaler, watch-dog timer, high speed uart, 8-bit sio, uart/sio, lcd controller/driver (optional booster), two type programmable pulse generators (ppg), an a/d converter, and external interrupt. *1 : f 2 mc stands for fujitsu flexible microcontroller. *2 : i 2 c of this product is comp lied to intel corp. system management bus rev. 1.0 spec ification and to the philips i 2 c specification. features ?f 2 mc-8l family cpu core low-voltage operation (when an a/d converter is not used) low current consumption (applicable to the dual-clock system) minimum execution time: 0.32 s at 12.5 mhz /3.5 v to 5.5 v (continued) pac k ag e s 80-pin plastic lqfp 80-pin plastic qfp 8 0-pin plastic lqfp 80-pin ceramic mqfp fpt-80p-m05 fpt-80p-m06 fpt-80p-m11 mqp-80c-p01
mb89560a series 2 (continued) i 2 c interface circuit lcd controller/driver: 24 segments x 4 commons (max 96 pixels, duty lcd mode and static lcd mode) lcd booster function (option) wild register (max 6 different address locations) 10-bit a/d converter: 8 channels three types of serial interface: high speed uart ( transfer rate from 300 bps to 192000 bps /10 mhz main clock) 8-bit serial i/o (sio) uart/sio two type of programmable pulse generator(ppg): 6-bit ppg and 12-bit ppg six types of timer 8-bit pwm 2 channels timers 8/16-bit timer/counter (8 bits x 2 channels or 16 bits x 1 channel) 21-bit timebase timer 8-bit pwc timer operation 17-bit watch prescaler watch-dog timer i/o ports: max 50 channels external interrupt 1: 8 channels external interrupt 2 (wake-up function): 4 channels low-power consumption modes (stop mode, sleep mode, and watch mode) lqfp-80 and qfp-80 package cmos technology
mb89560a series 3 product lineup (continued) part number parameter mb89567a mb89567ac mb89p568 mb89pv560 classification mass production products (mask rom products) otp piggy-back rom size 32 k x 8-bit (internal mask rom) 48 k x 8-bit (internal prom) 56 k x 8-bit (external rom) ram size 1 k x 8-bit 1 k x 8-bit cpu functions number of instructions : 136 instruction bit length : 8-bit instruction length : 1 to 3 bytes data bit length : 1-, 8-, 16-bit minimum execution time : 0.32 s/12.5 mhz minimum interrupt processing time : 2.88 s/12.5 mhz ports general-purpose i/o ports (n-channel open drain): 20 pins (2 shared with i 2 c inputs, 16 shared with lcd, 2 shared with other resources) general-purpose i/o ports (cmos) : 30 pins (shared with resources) total : 50 pins 21-bit timebase timer 21-bit interrupt cycle: (2 13 , 2 15 , 2 18 or 2 22 )/f ch * 7 watchdog timer reset generate cycle: min 2 21 /f ch * 7 for main clock, min 2 14 /f cl * 7 for sub clock watch prescaler 17-bit interrupt cycle: 31.25 ms, 0.25 s, 0.50 s, 1.00 s, 2.00 s, 4.00 s/32.768 khz for subclock 8/16-bit timer/ counter can be operated either as a 2-channel 8-bit timer/counter (timer 1 and timer 2, each with its own independent operating clock cycl e), or as one 16-bit timer/counter in timer 1 or 16-bit timer/counter operation, event counter operation (external clock-triggered) and square wave output capable 8-bit pwm 2 ch timer 8-bit interval timer operation (square wave output capable, operating clock cycle: 1 t inst , 8 t inst , 16 t inst , 64 t inst ) 8-bit resolution pwm operatio n (conversion cycle: 128 x 1 t inst to 256 x 64 t inst ) 8/16-bit timer/counte r output for counter clock selectability pwc timer 8-bit timer operation (count clock cycle: 1 t inst , 4 t inst , 32 t inst ) 8-bit reload timer operation (toggle output possible, operating clock cycle: 1 to 32 t inst ) 8-bit pulse width measurement (continuous measurement possible: h-width, l-width, rising edge to rising edge, falling edge to falling edge, and ri sing edge to falling edge) 10-bit a/d converter * 2 10-bit resolution 8 channels a/d conversion function (conversion time: 60 t inst ) continuous activation by an 8/16-bit timer/counter output or a timebase timer output capable. 6-bit ppg internal 6-bit counter pulse width and cycle ar e program selectable 12-bit ppg internal 12-bit counter pulse width and cycle ar e program selectable
mb89560a series 4 (continued) *1 : when booster is used, the bias is reduced by 1/3. it can be selected by mask option. *2 : voltage varies with product. *3 : when external rom is used, eprom: mbm27c512-20 should be used, the operating voltage: 4.5 v to 5.5 v. *4 : i 2 c is complied to intel corp. syst em management bus rev. 1.0 sp ecification and to the philips i 2 c specification. *5 : 1 t inst = one instruction cycle (execution time) which can be selected as 1/4, 1/8, 1/16, or 1/64 of main clock if main clock mode is selected , or 1/2 of the subclock if subclock mode is selected. *6 : varies with conditions such as the operating frequency. (see ? electrical characteristics.?) *7 : f ch : main clock source oscillation, f cl : sub clock source oscillation part number parameter mb89567a mb89567ac mb89p568 mb89pv560 i 2 c interface* 4 not available 1 channel high speed uart transfer data length: 4-, 6-, 7-, 8-bit transfer rate (300 bps to 192000 bps /9.216 mhz main clock) support sub-clock mode uart/sio transfer data length: 7-, 8-bit for uart, 8-bit for sio transfer rate (1201 bps to 78125 bps / 10 mhz main clock) support sub-clock mode 8-bit serial i/o 8-bit, lsb first/msb first selectability transfer clocks (one external shift cl ock, three internal shift clocks: 2 t inst , 8 t inst , 32 t inst ) * 5 lcd common output: 4 (max) segment output: 24 (max) lcd driving power (bias) pins: 4 lcd display ram size: 12 bytes (24 4 bits, max 96 pixels) duty lcd mode and static lcd mode booster for lcd driving: option* 1 dividing resistor for lcd driving: option wild register maximum of 6-byte data can be assigned in 6 different address. used to replace any data in the rom when sp ecific address and data are assigned in wild register. wild register can be set up by using different communication methods through the device. external interrupt 1 (wake-up function) 8 independent channels (interrupt vector, request flag, request output enable) edge selectabilit y (rising/falling) used also for wake-up from stop/sleep mode. (edge detection is also permitted in stop mode.) external interrupt 2 (wake-up function) 4 channels (?l? level interrupts, independent input enable). used also for wake-up from stop/sleep mode. (low-level detection is also permitted in stop mode.) standby mode sub clock mode, sleep mode, stop mode and clock mode process cmos operating voltage * 6 2.2 v to 5.5 v 2.7 v to 5.5 v 2.7 v to 5.5 v* 3
mb89560a series 5 package and corres ponding products differences among products 1. memory size before evaluating using the otprom (one-time prom) products, verify its differences from the product that will actually be used. take particul ar care on the following points: the stack area, etc., is set at the upper limit of the ram. 2. current consumption for the mb89pv560, add the current consumed by the eprom mounted in the piggy-back socket. when operating at low speed, the current consumed by the one-time prom product is greater than that for the mask rom product. however, the current consumption is roughly the same in sleep or stop mode. for more information, see ? electrical characteristics.? 3. mask options the functions available as options and the method of specifying options differ between products. before using options check ? mask options.? 4. wild register function the wild register can be used in the following address spaces. 5. p40, p41 it will take about 64 count clock of external oscillati on to initialize p40 and p4 1 pins in mb89pv560/p568. therefore, these ports will be unstable for a while during power-on . for mb89567a/567ac, these ports will be in high-z during power-on. package mb89567a mb89567ac mb89p568-101 mb89p568-102 mb89pv560-101 mb89pv560-102 fpt-80p-m05 fpt-80p-m06 fpt-80p-m11 mqp-80c-p01 device address space mb89pv560 4000 h to ffff h mb89p568 4000 h to ffff h mb89567a/567ac 8000 h to ffff h
mb89560a series 6 pin assignment (continued) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 seg07 p50/seg08 p51/seg09 p52/seg10 p53/seg11 p54/seg12 p55/seg13 p56/seg14 p57/seg15 p60/seg16 p61/seg17 p62/seg18 vss p63/seg19 p64/seg20 p65/seg21 p66/seg22 p67/seg23 avr avcc 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 p44/uck/sck1 p43/pwm2/ppg2 p42/pwm1/ec1 p41/hck* 1 /to12 p40/wto/to11 p31/sda p30/scl vcc p27/int23 p26/int22 p25/int21 p24/int20 p23/ppg1 p22/sck p21/so p20/si x1 x0 moda x1a 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 seg06 seg05 seg04 seg03 seg02 seg01 seg00 com3 com2 com1 com0 v3 v2 v1 v0 c0* 2 c1* 2 p47/pwc p46/ui/si1 p45/uo/so1 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 p07/an7 p06/an6 p05/an5 p04/an4 p03/an3 p02/an2 p01/an1 p00/an0 avss p17/int17 p16/int16 p15/int15 p14/int14 p13/int13 p12/int12 p11/int11 c p10/int10 rst x0a (top view) (fpt-80p-m05) (fpt-80p-m11) *1: main clock divided by two output *2: for built-in lcd booster only note: for mask option of *2, please refer to ? mask options?.
mb89560a series 7 (continued) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 seg05 seg06 seg07 p50/seg08 p51/seg09 p52/seg10 p53/seg11 p54/seg12 p55/seg13 p56/seg14 p57/seg15 p60/seg16 p61/seg17 p62/seg18 vss p63/seg19 p64/seg20 p65/seg21 p66/seg22 p67/seg23 avr avcc p07/an7 p06/an6 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 p46/ui/si1 p45/uo/so1 p44/uck/sck1 p43/pwm2/ppg2 p42/pwm1/ec1 p41/hck* 1 /to12 p40/wto/to11 p31/sda p30/scl vcc p27/int23 p26/int22 p25/int21 p24/int20 p23/ppg1 p22/sck p21/so p20/si x1 x0 moda x1a x0a rst 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 seg04 seg03 seg02 seg01 seg00 com3 com2 com1 com0 v3 v2 v1 v0 c0* 2 c1* 2 p47/pwc 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 p05/an5 p04/an4 p03/an3 p02/an2 p01/an1 p00/an0 avss p17/int17 p16/int16 p15/int15 p14/int14 p13/int13 p12/int12 p11/int11 c p10/int10 (top view) (fpt-80p-m06) *1: main clock divided by two output *2: for built-in lcd booster only note: for mask option of *2, please refer to ? mask options?.
mb89560a series 8 (continued) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 seg05 seg06 seg07 p50/seg08 p51/seg09 p52/seg10 p53/seg11 p54/seg12 p55/seg13 p56/seg14 p57/seg15 p60/seg16 p61/seg17 p62/seg18 vss p63/seg19 p64/seg20 p65/seg21 p66/seg22 p67/seg23 avr avcc p07/an7 p06/an6 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 p46/ui/si1 p45/uo/so1 p44/uck/sck1 p43/pwm2/ppg2 p42/pwm1/ec1 p41/hck* 1 /to12 p40/wto/to11 p31/sda p30/scl vcc p27/int23 p26/int22 p25/int21 p24/int20 p23/ppg1 p22/sck p21/so p20/si x1 x0 moda x1a x0a rst 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 seg04 seg03 seg02 seg01 seg00 com3 com2 com1 com0 v3 v2 v1 v0 c0* 2 c1* 2 p47/pwc 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 p05/an5 p04/an4 p03/an3 p02/an2 p01/an1 p00/an0 avss p17/int17 p16/int16 p15/int15 p14/int14 p13/int13 p12/int12 p11/int11 c p10/int10 (top view) 101 102 103 104 105 106 107 108 109 93 92 91 90 89 88 87 86 85 100 99 98 97 96 95 94 110 111 112 81 82 83 84 (mqp-80c-p01) * 3 *1: main clock divided by two output *2: for built-in lcd booster only *3: pin assignment on package top (mb89pv560 only) n.c.: internally connected. do not use. note: for mask option of *2, please refer to ? mask options?. pin no. pin pin no. pin pin no. pin pin no. pin 81 n.c. 89 ad2 97 n.c. 105 oe 82 a15 90 ad1 98 04 106 n.c. 83 a12 91 ad0 99 o5 107 a11 84 ad7 92 n.c. 100 o6 108 a9 85 ad6 93 o1 101 07 109 a8 86 ad5 94 o2 102 o8 110 a13 87 ad4 95 o3 103 ce 111 a14 88 ad3 96 vss 104 a10 112 vcc
mb89560a series 9 pin description (continued) pin no. pin name i/o circuit type function lqfp* 1 lqfp* 2 mqfp* 3 qfp* 4 43 45 x0 a crystal or other resonator connector pins for the main clock. the external clock can be connec ted to x0. when this is done, be sure to leave x1 open. 44 46 x1 42 44 moda c memory access mode setting pins. connect directly to vss. hysteresis input type. 39 41 rst d reset i/o pin this pin is a cmos output type with a pull-up resistor, and a hysteresis input type. ?l? is output from this pin by an internal reset request (optional). the internal circuit is init ialized by the input of ?l?. 49 to 52 51 to 54 p24/int20 to p27/int23 e general-purpose cmos i/o ports also serve as an external interr upt 2 input (wake-up function). external interrupt 2 input is hysteresis input. selectable pull-up resistor. 30 to 36, 38 32 to 38, 40 p10/int10 to p17/int17 e general-purpose cmos i/o ports also serve as input for external interrupt 1 input. external interrupt 1 input is hysteresis input. selectable pull-up resistor. 60 62 p44/uck/ sck1 e general-purpose cmos i/o ports also serve as the clock i/o for the high-speed uart and serial i/o. the peripheral is a hysteresis input type. selectable pull-up resistor. 61 63 p45/uo/ so1 f general-purpose cmos i/o ports also serves as the data output for the high-speed uart and serial i/o. 62 64 p46/ui/si1 g n-ch open drain general-purpose i/o ports also serves as the data input for the high-speed uart and serial i/o. the peripheral is a hysteresis input type. 63 65 p47/pwc g n-ch open drain general-purpose i/o port also serve as the external clock input for pwc. the peripheral is a hysteresis input. 56 58 p40/wto/ to11 f general-purpose cmos i/o port also serves as an 8/16-bit time r/counter output and pwc output.
mb89560a series 10 (continued) pin no. pin name i/o circuit type function lqfp* 1 lqfp* 2 mqfp* 3 qfp* 4 57 59 p41/hck/ to12 f general-purpose cmos i/o port also serves as an 8/16-bit timer/counter output. and half of main clock output selectable pull-up resistor. 45 47 p20/si e general-purpose cmos i/o port also serves as the data input for the serial i/o. the peripheral is a hysteresis input type. selectable pull-up resistor. 46 48 p21/so f general-purpose cmos i/o port also serves as the data output for the serial i/o. selectable pull-up resistor. 47 49 p22/sck e general-purpose cmos i/o port also serves as the clock i/o for the serial i/o. the peripheral is a hysteresis input type. selectable pull-up resistor. 48 50 p23/ppg1 f general-purpose cmos i/o port also serves as the 6 bit ppg output pin. selectable pull-up resistor. 54 56 p30/scl g n-ch open-drain general-purpose i/o port clock i/o pin for i 2 c interface 55 57 p31/sda g n-ch open-drain general-purpose i/o port data i/o pin for i 2 c interface 65 67 c0 ? function as capacitor connection pin in the products with a booster. 64 66 c1 59 61 p43/ pwm2/ ppg2 f general-purpose cmos i/o port also serves pwm wave output for the 8-bit pwm timer 1 and as 12 bit programmable pulse generator output. selectable pull-up resistor. 58 60 p42/ pwm1/ ec1 e general-purpose cmos i/o port also serves as the pwm wave output and external clock for the 8/16 bit timer counter. selectable pull-up resistor. 21 to 28 23 to 30 p00/an0 to p07/an7 j general-purpose cmos i/o ports also serve as the analog input for the a/d converter. selectable pull-up resistor.
mb89560a series 11 (continued) *1: fpt-80p-m05 *2: fpt-80p-m11 *3: mqp-80c-p01 *4: fpt-80p-m06 *5: when mb89567a / mb89567ac / mb 89pv560-101 / mb89pv560- 102 is used, this pin will become nc pin without internal connection. there is no prob lem to leave pins open, to fix pins at v cc and to fix pins at v ss . when mb89p568-101 or mb89p568-102 is used, this pin must be connected to v ss . pin no. pin name i/o circuit type function lqfp* 1 lqfp* 2 mqfp* 3 qfp* 4 10 to 12 14 to 18 12 to 14 16 to 20 p60/ seg16 to p67/ seg23 h n-ch open-drain general-purpose output ports also serve as an lcd controller/driver segment output. 2 to 9 4 to 11 p50/seg8 to p57/ seg15 h n-ch open-drain general-purpose output ports also serve as an lcd controller/driver segment output. 74 to 80, 1 1 to 3 76 to 80 seg0 to seg7 i lcd controller/driver segment output-only pins 70 to 73 72 to 75 com0 to com3 i lcd controller/driver common output-only pins 66 to 69 68 to 71 v0 to v3 ? lcd driving power supply pins. 40 42 x0a b crystal or other resonator connector pins for the subclock (subclock: 32.768 khz) 41 43 x1a 53 55 vcc ? power supply pin 37 39 c ? capacitor connection pin *5 13 15 vss ? power supply (gnd) pin 20 22 avcc ? a/d converter power supply pin 19 21 avr ? a/d converter reference voltage input pin 29 31 avss ? a/d converter power supply pin use this pin at the same voltage as v ss .
mb89560a series 12 for external eprom socket (mb89pv560 only) pin no. pin name i/o function 82 83 84 85 86 87 88 89 90 91 a15 a12 a7 a6 a5 a4 a3 a2 a1 a0 o address output pins 93 94 95 o1 o2 o3 i data input pins 96 vss o power supply (gnd) pin 98 99 100 101 102 o4 o5 o6 o7 o8 i data input pins 103 ce o rom chip enable pin outputs ?h? during standby. 104 a10 o address output pin 105 oe /v pp o rom output enable pin outputs ?l? at all times. 107 108 109 a11 a9 a8 o address output pins 110 a13 o 111 a14 o 112 vcc o eprom power supply pin 81 92 97 106 n.c. ? internally connected pins be sure to leave them open.
mb89560a series 13 i/o circuit type (continued) type circuit remarks a main clock (main clock crystal oscillator) at an oscillation feedback resistor of approximately 1 m ? /5.0 v b subclock (subclock crystal oscillator) at an oscillation feedback resistor of approximately 4.5 m ? /5.0 v c hysteresis input d cmos output hysteresis input at an output pull-up resistor (p-ch) of approximately 50 k ? /5.0 v e cmos output cmos input the peripheral is a hysteresis input type. selectable pull-up resistor (p-ch) of approximately 50 k ? /5.0 v nch nch x1 x0 pch pch main clock control signal nch nch x1a x0a pch sub clock control signal r pch nch pch pch nch r pull-up control register port peripheral
mb89560a series 14 (continued) type circuit remarks f cmos output cmos input selectable pull-up resistor (p-ch) of approximately 50 k ? /5.0 v g n-ch open-drain input/output cmos input the peripheral is a hysteresis input type. (p30,p31 are or-type input for i 2 c) h n-ch open-drain output cmos input lcd controller/driver segment output i lcd controller/driver common/ segment output j general cmos i/o analog input (a/d converter) selectable pull-up resistor (p-ch) of approximately 50 k ? /5.0 v pull-up resistors must be disabled when used as an analog input. pch pch nch r pull-up resistor control register port nch port peripheral nch nch pch pch nch port nch pch pch nch pch pch nch r aden pull-up control register port analog input
mb89560a series 15 handling devices 1. preventing latchup latchup may occur on cmos ics if voltage higher than v cc or lower than v ss is applied to input and output pins other than medium- to high-voltage pins or if higher than the voltage which shows on ?1. absolute maximum ratings? in ? electrical characteristic s? is applied between v cc and v ss . when latchup occurs, power supply current increase s rapidly and might thermally damage elements. when using, take great care not to exceed the absolute maximum ratings. also, take care to prevent the analog power supply (av cc and avr) and analog input from exceeding the digital power supply (v cc ) when the analog system power supply is turned on and off. 2. treatment of unused input pins leaving unused input pins open could cause malfunctions. they should be connected to a pull-up or pull-down resistor. 3. treatment of power supply pins on microcontrollers with a/d and d/a converters connect to be av cc = dv cc = v cc and av ss = avr = v ss even if the a/d and d/a converters are not in use. 4. treatment of n.c. pins be sure to leave (internally connected) n.c. pins open. 5. power supply voltage fluctuations although v cc power supply voltage is assured to operate within the rated range, a rapid fluctuation of the voltage could cause malfunctions, even if it occurs within the rated range. stabilizing voltage supp lied to the ic is therefore important. as stabiliz ation guidelines, it is recommend ed to control power so that v cc ripple fluctuations (p-p value) will be less than 10% of the standard v cc value at the commercial frequency (50 hz to 60 hz) and the transient fluctuation rate will be less than 0.1 v/ms at the time of a momentary fluctuation such as when power is switched. 6. precautions when using an external clock even when an external clock is used , oscillation stabilization time is re quired for power-on reset and wake-up from stop mode. 7. unused lcd dedicated pins when lcd dedicated pins are not in use, keep it open. 8. ports shared with seg pin when using port shared with seg pin, be sure that the input voltage to port does not exceed the voltage of v3 (seg driving voltage). this is particularly important to those devices with booster. when power-on or reset, seg pin will output an initial value of ?l?. 9. lcd not in use when lcd is not in use, connect the v3 pin to vcc and keep other lcd dedicated pins open. 10. wild register function in mb89pv560, wild regist er function cannot be evaluated. to evalua te the wild register function, use mb89p568. 11. programming operation on ram program operation debugging at ram is not possible even when using mb89pv560. 12. note to noise in the external reset pin (rst ) if the reset pulse applied to the external reset pin (rst ) does not meet the specifications, it may cause malfunc- tions. use caution so that the reset pulse less than the sp ecifications will not be fed to the external reset pin (rst ) .
mb89560a series 16 programming to the eprom on the mb89p568 the mb89p568 is an otprom version of the mb89567a and mb89567ac. 1. features 48-kbyte prom on chip equivalency to the mbm27c1001 in eprom mode (when programmed with the eprom programmer) 2. memory space memory space in eprom m ode is diagrammed below. 3. programming to the eprom in eprom mode, the mb89p568 functions equivalent to the mbm27c1001. this allows the prom to be programmed with a general-purpose eprom programmer (the electronic signature mode cannot be used) by using the dedicated socket adapter. programming procedure (1) set the eprom programmer to the mbm27c1001. (2) load program data into the eprom programmer at 4000 h to ffff h (3) program with the eprom programmer. 0000 h 0080 h 0480 h ffff h i/o ram 4000 h ffff h 4000 h eprom mode (corresponding addresses on the eprom programmer) not available program area (prom) normal operation program area (prom)
mb89560a series 17 4. recommended screening conditions high-temperature aging is recommended as the pre-assembly screening procedure. 5. programming yield all bits cannot be programmed at fujitsu microelectronics shipping test to a blanked otprom micro- computer, due to its nature. for this reason, a programming yield of 100% cannot be assured at all times. 6. eprom programmer socket adapter inquiry: san hayato co., ltd.: fax + 81-3-5396-9106 (tokyo) package compatible socket adapter fpt-80p-m05 rom-80sqf-32dp-8la fpt-80p-m06 rom-80qf-32dp-8la2 fpt-80p-m11 rom-80qf2-32dp-8la2 program, verify program, verify + 100 c, 48 h read assembly
mb89560a series 18 programming to the eprom with piggyback/evaluation device 1. eprom for use mbm27c512-20tv 2. programming socket adapter to program to the prom using an eprom programmer, use the socket adapter (manufacturer: sun hayato co., ltd.) listed below. inquiry: san hayato co., ltd.: fax + 81-3-5396-9106 (tokyo) 3. memory space 4. programming to eprom (1) set the eprom programmer to the mbm27c512. (2) load program data into the eprom programmer at 2000 h to ffff h . (3) program to 2000 h to ffff h with the eprom programmer. package adapter socket part number lcc-32 (rectangle) rom-32lc-28dp-yg 0000 h 0080 h 0480 h ffff h i/o ram 2000 h ffff h 2000 h normal operation eprom mode (corresponding addresses on the eprom programmer) not available program area (prom) program area (prom)
mb89560a series 19 block diagram oscillator clock controller low-power oscillator (32.768 khz) 1k byte ram f 2 mc-8l cpu 32k* 6 byte rom other pins moda, c,* 5 v cc , v ss internal data bus 21-bit time-base uart/sio port 2 cmos i/o port port 5 & port 6 *1: output of main clock/2. *2: i 2 c is not available in mb89567a. *3: selected by mask option *4: can be used as a 16-bit timer/counter by connecting timer 1 output to timer 2 input. *5: c pin becomes nc pin in mb89567a/ac/pv560 *6: 48 k byte rom for mb89p568 x0 x1 p10/int10 to p17/int17 p23/ppg1 p20/si p21/so p22/sck timer main clock watch prescaler reset circuit (watchdog timer) rst x0a x1a port 1 cmos i/o port external interrupt 2 (wake-up function) port 4 8 8 p24/int20 to p27/int23 4 4 port 0 cmos i/o port 10-bit a/d converter p00/an0 to p07/an7 8 8 av cc av ss n-ch open-drain output port lcd controller/ driver display ram (12 bytes) 8-bit pwm timer 1 p60/seg16 to p63/seg19 p64/seg20 to p67/seg23 p50/seg8 to p53/seg11 p54/seg12 to p57/seg15 seg0 to seg7 8 com0 to com3 4 v0 to v3 4 8 8 subclock 8-bit pwm timer 2 avr port 3 n-ch open drain i/o port i 2 c* 2 p30/scl p31/sda c0* 3 c1* 3 8-bit timer/counter 1 (timer 1) * 4 8-bit timer/counter 2 (timer 2) *4 pwc sio p40/wto/to11 p41/hck* 1 /to12 p42/pwm1/ec1 p43/pwm2/ppg2 p44/uck/sck1 p45/uo/so1 p46/ui/si1 p47/pwc wild register high-speed external interrupt 1 booster option 12 bit ppg 6 bit ppg uart cmos i/o port (p46 and p47 are n-ch open-drain i/o type) 4 4 4 4
mb89560a series 20 cpu core 1. memory space the microcontrollers of the mb89560a series offer a memory space of 64 kbytes for storing all of i/o, data, and program areas. the i/o area is located the lowest address. the data area is provided immediately above the i/ o area. the data area can be divided into register, stack, and direct areas according to the application. the program area is located at exactly the opposite end, that is, near the highest address. provide the tables of interrupt reset vectors and vector call instructions toward the highest address within the program area. the memory space of the mb89560a series is structured as illustrated below. 0000 h 0080 h 0100 h 4000 h mb89p568-101,102 i/o ram 0000 h 0080 h 0100 h 0200 h 8000 h ffff h mb89567a, mb89567ac i/o ram ffff h 0200 h ffc0 h ffc0 h 0480 h 0000 h 0080 h 0100 h 2000 h mb89pv560-101,102 i/o ram rom ffff h 0200 h ffc0 h 0480 h *2 *2 *2 0480 h 0492 h 0492 h 0492 h *1 : mb89p568-101,102 has otp rom inside. *2 : wild register setting registers memory space register access prohibited register register access prohibited access prohibited external* 1 rom external* 1 rom vector table (reset ? interrupt ? vector call instruction)
mb89560a series 21 2. registers the f 2 mc-8l family has two types of registers; dedicated registers in the cpu and general-purpose registers in the memory. the following registers are provided: program counter (pc) : a 16-bit register for indicating specifies instruction storage positions. accumulator (a) : a 16-bit temporary register for storing arithmetic operations, etc. when the instruction is an 8-bit data processing instruction, the lower byte is used. temporary accumulator (t): a 16-bit register which performs arithmetic operations with the accumulator when the instruction is an 8-bit data processing instruction, the lower byte is used. index register (ix) : a 16-bit register for index modification extra pointer (ep) : a 16-bit pointer for indicating a memory address stack pointer (sp) : a 16-bit register for indicating a stack area program status (ps) : a 16-bit register for storing a register pointer, a condition code the ps can further be divided into higher 8 bits for use as a register bank pointer (rp) and the lower 8 bits for use as a condition code register (ccr). (see the diagram below.) p c a i x e p s p p s fffd h initial value 16 bits : program counter : accumulator : temporally accumulator : indexing register : extra pointer : stuck pointer : program status undefined undefined undefined undefined undefined i flag = 0, il1, 0 = 11 other bits are undefined. 15 14 13 12 11 10 9 8 h i il1 il0 n z v c ccr 76543210 ps rp rp va- cancy va- cancy va- cancy ? structure of program status
mb89560a series 22 the rp indicates the address of the register bank currently in use. the relationship between the pointer contents and the actual address is based on the conversion rule illustrated below. the ccr consists of bits indicating the results of arit hmetic operations and the contents of transfer data and bits for control of cpu operations at the time of an interrupt. h-flag : set when a carry or a borrow from bit 3 to bit 4 occurs as a result of an arithmetic operation. cleared otherwise. this flag is for de cimal adjustment instructions. i-flag : interrupt is allowed when this flag is set to 1. interrupt is prohibited when the flag is set to 0. set to 0 when reset. il1, 0 : indicates the level of the interrupt currently allowed. processes an interrupt only if its request level is higher than the value indicated by this bit. n-flag : set if the msb is set to 1 as the result of an arithmetic operation. cleared when the bit is set to 0. z-flag : set when an arithmetic operation results in 0. cleared otherwise. v-flag : set if the complement on 2 overflows as a result of an arithmetic operation. reset if the overflow does not occur. c-flag : set when a carry or a borrow from bit 7 occurs as a result of an arithmetic operation. cleared otherwise. set to the shift-out value in the case of a shift instruction. the following general-purpose registers are provided : general-purpose registers : an 8-bit resister for storing data il1 il0 interrupt level high-low 00 1 high low = no interrupt 01 10 2 11 3 "0" "0" "0" "1" "0" "0" "0" "0" r0 b2 b1 b0 r4 r3 r2 r1 a11 a10 a9 a8 a15 a14 a13 a12 a3 a2 a1 a7 a6 a5 a4 a0 rp upper operation code lower ? rule for conversion of actual addresses of the general-purpose register area generated address
mb89560a series 23 the general-purpose registers are 8 bits and located in the register banks of the memory. one bank contains eight registers. up to a total of 32 banks can be used. the bank currently in use is indicated by the register bank pointer (rp). r 0 r 1 r 2 r 3 r 4 r 5 r 6 r 7 ? register bank configuration this address = 0100 h + 8 (rp) 32 bank (mb89567a/567ac) memory range
mb89560a series 24 i/o map (continued) address register name register description read/write initial value 00 h pdr0 port 0 data register r/w xxxxxxxx b 01 h ddr0 port 0 data direction register w 00000000 b 02 h pdr1 port 1 data register r/w xxxxxxxx b 03 h ddr1 port 1 data direction register w 00000000 b 04 h to 06 h (vacancy) 07 h sycc system clock control register r/w xxxmm100 b 08 h stbc standby control register r/w 00010xxx b 09 h wdtc watchdog timer control register w 0xxxxxxx b 0a h tbtc timebase timer control register r/w 00xxx000 b 0b h wpcr watch prescaler control register r/w 00xx0000 b 0c h pdr2 port 2 data register r/w xxxxxxxx b 0d h ddr2 port 2 data direction register r/w 00000000 b 0e h pdr3 port 3 data register r/w xxxxxx11 b 0f h pdr4 port 4 data register r/w xxxxxxxx b 10 h ddr4 port 4 direction register r/w xx000000 b 11 h pdr5 port 5 data register r/w 00000000 b 12 h (vacancy) 13 h pdr6 port 6 data register r/w 00000000 b 14 h to 19 h (vacancy) 1a h t2cr timer2 control register r/w x00000x0 b 1b h t2dr timer2 data register r/w xxxxxxxx b 1c h t1cr timer1 control register r/w x00000x0 b 1d h t1dr timer1 data register r/w xxxxxxxx b 1e h to 21 h (vacancy) 22 h smc11 uart1 mode control register 1 r/w 00000000 b 23 h src1 uart1 mode data register r/w xx011000 b 24 h ssd1 uart1 status/data register r/w 00100x1x b 25 h sidr1/sodr1 uart1 data register r/w xxxxxxxx b 26 h smc12 uart1 mode control register 2 r/w xx100001 b 27 h cntr1 pwm control register 1 r/w 00000000 b 28 h cntr2 pwm control register 2 r/w 000x0000 b 29 h cntr3 pwm control register 3 r/w x000xxxx b 2a h comr1 pwm compare register 1 w xxxxxxxx b 2b h comr2 pwm compare register 2 w xxxxxxxx b 2c h pcr1 pwc pulse width control register 1 r/w 000xx000 b
mb89560a series 25 (continued) address register name register description read/write initial value 2d h pcr2 pwc pulse width control register 2 r/w 00000000 b 2e h rlbr pwc reload buffer register r/w xxxxxxxx b 2f h smc21 uart2/sio mode control register r/w 00000000 b 30 h smc22 uart2/sio mode control register 2 r/w 00000000 b 31 h ssd2 uart2/sio status/data register r/w 00001xxx b 32 h sidr2/sodr2 uart2/sio data register r/w xxxxxxxx b 33 h src2 uart2/sio rate control register r/w xxxxxxxx b 34 h adc1 a/d control register 1 r/w x00000x0 b 35 h adc2 a/d control register 2 r/w x0000001 b 36 h addl a/d data register l r/w xxxxxxxx b 37 h addh a/d data register h r/w xxxxxxxx b 38 h rcr21 ppg control register 1(ppg2) r/w 00000000 b 39 h rcr23 ppg control register 3(ppg2) r/w 0x000000 b 3a h rcr22 ppg control register 2(ppg2) r/w xx000000 b 3b h rcr24 ppg control register 4(ppg2) r/w xx000000 b 3c h to 3e h (vacancy) 3f h eic1 external interrupt 1 control register 1 r/w 00000000 b 40 h eic2 external interrupt 1 control register 2 r/w 00000000 b 41 h eic3 external interrupt 1 control register 3 r/w 00000000 b 42 h eic4 external interrupt 1 control register 4 r/w 00000000 b 43 h to 50 h (vacancy) 51 h ibsr i 2 c bus status register r 00000000 b 52 h ibcr i 2 c bus control register r/w 00000000 b 53 h iccr i 2 c clock control register r/w 000xxxxx b 54 h iadr i 2 c address register r/w xxxxxxxx b 55 h idar i 2 c data register r/w xxxxxxxx b 56 h eie2 external interrupt 2 enable register r/w xxxx0000 b 57 h eif2 external interrupt 2 flag register r/w xxxxxxx0 b 58 h rcr1 ppg control register 1(ppg1) r/w 00000000 b 59 h rcr2 ppg control register 2(ppg1) r/w 0x000000 b 5a h ckr clock output control register r/w 00000000 b 5b h lcr1 lcd controller/driver control register 1 r/w 00010000 b 5c h lcr2 lcd controller/driver control register 2 r/w 00000000 b 5d h lcr3 lcd controller/driver control register 3 r/w xx000000 b 5e h ldr1 lcd data register 1 r/w xxxxxxxx b
mb89560a series 26 (continued) read/write access symbols r/w : readable and writable r : read-only w : write-only initial value symbols 0 : the initial value of this bit is ?0?. 1 : the initial value of this bit is ?1?. x : the initial value of this bit is undefined. m : the initial value of this bi t is determined by mask option. note : do not use vacancies. address register name register description read/write initial value 5f h (vacancy) 60 h to 6b h vram display ram r/w xxxxxxxx b 6c h to 6f h (vacancy) 70 h smr serial i/o mode register r/w 00000000 b 71 h sdr serial i/o data register r/w xxxxxxxx b 72 h purr0 pull-up resistor register 0 r/w 11111111 b 73 h purr1 pull-up resistor register 1 r/w 11111111 b 74 h purr2 pull-up resistor register 2 r/w 11111111 b 75 h purr4 pull-up resistor register 4 r/w xx111111 b 76 h (vacancy) 77 h wren wild register enable register r/w xx000000 b 78 h wror wild register data test register r/w xx000000 b 79 h aden a/d port input enable register r/w 11111111 b 7a h (vacancy) 7b h ilr1 interrupt level setting register 1 w 11111111 b 7c h ilr2 interrupt level setting register 2 w 11111111 b 7d h ilr3 interrupt level setting register 3 w 11111111 b 7e h ilr4 interrupt level setting register 4 w 11111111 b 7f h itr interrupt test register access prohibited 11111111 b
mb89560a series 27 wild register i/o map read/write access symbols r/w : readable and writable r : read-only w : write-only initial value symbols 0 : the initial value of this bit is ?0?. 1 : the initial value of this bit is ?1?. x : the initial value of this bit is undefined. m : the initial value of this bi t is determined by mask option. note : do not use vacancies. address register name register description read/write initial value 480 h wrarh1 wild register high-by te address register1 r/w xxxxxxxx b 481 h wrarl1 wild register low-by te address register1 r/w xxxxxxxx b 482 h wrdr1 wild register data register1 r/w xxxxxxxx b 483 h wrarh2 wild register high-by te address register2 r/w xxxxxxxx b 484 h wrarl2 wild register low-by te address register2 r/w xxxxxxxx b 485 h wrdr2 wild register data register2 r/w xxxxxxxx b 486 h wrarh3 wild register high-by te address register3 r/w xxxxxxxx b 487 h wrarl3 wild register low-by te address register3 r/w xxxxxxxx b 488 h wrdr3 wild register data register3 r/w xxxxxxxx b 489 h wrarh4 wild register high-by te address register4 r/w xxxxxxxx b 48a h wrarl4 wild register low-by te address register4 r/w xxxxxxxx b 48b h wrdr4 wild register data register4 r/w xxxxxxxx b 48c h wrarh5 wild register high-by te address register5 r/w xxxxxxxx b 48d h wrarl5 wild register low-by te address register5 r/w xxxxxxxx b 48e h wrdr5 wild register data register5 r/w xxxxxxxx b 48f h wrarh6 wild register high-by te address register6 r/w xxxxxxxx b 490 h wrarl6 wild register low-by te address register6 r/w xxxxxxxx b 491 h wrdr6 wild register data register6 r/w xxxxxxxx b
mb89560a series 28 electrical characteristics 1. absolute maximum ratings (av ss = v ss = 0.0 v) (continued) parameter symbol rating unit remarks min max power supply voltage v cc av cc v ss ? 0.3 v ss + 6.0 v mb89567a, mb89567ac, mb89p568 and mb89pv560* 1 avr must not exceed ?avcc + 0.3v?. avr v ss ? 0.3 v ss + 6.0 v lcd power voltage v0 to v3 v ss ? 0.3 v ss + 6.0 v v0 to v3 should not exceed vcc without booster program voltage v pp v ss ? 0.6 v ss +13.0 v only for the mb89p568 input voltage v i v ss ? 0.3 v cc + 0.3 v for pins other than p30, p31, p46, p47, p50 to p57 and p60 to p67 v ss ? 0.3 v cc + 0.3 v p50 to p57, p60 to p67 resister ladder option v ss ? 0.3 v3 v p50 to p57, p60 to p67 lcd booster option v ss ? 0.3 v ss + 6.0 v for p30, p31, p46, p47 output voltage v o v ss ? 0.3 v cc + 0.3 v for pins other than p30, p31, p46, p47, p50 to p57 and p60 to p67 v ss ? 0.3 v cc + 0.3 v p50 to p57, p60 to p67 resister ladder option v ss ? 0.3 v3 v p50 to p57, p60 to p67 lcd booster option v ss ? 0.3 v ss + 6.0 v for p30, p31, p46, p47 ?l? level maximum output current i ol ? 15 ma for pins other than p20 to p27 30 ma for p20 to p27 only ?l? level average output current i olav ? 4 ma for pins other than p20 to p27* 2 15 ma for p20 to p27 only* 2 ?l? level total maximum output current i ol ? 100 ma ?l? level total average output current i olav ? 60 ma *2 ?h? level maximum output current i oh ? ? 15 ma for pins other than p20 to p27, p30, p31, p46, p47, p50 to p57, p60 to p67 ? 30 ma for p20 to p27 only ?h? level average output current i ohav ? ? 4 ma for pins other than p20 to p27* 2 ? 15 for p20 to p27 only* 2
mb89560a series 29 (continued) (av ss = v ss = 0.0 v) *1 : use av cc and v cc set at the same voltage. take care so that avr does not exceed av cc + 0.3 v, such as when power is turned on. take care so that av cc does not exceed v cc , such as when power is turned on. *2 : average value (operating current operating rate) warning: semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. do not exceed these ratings. parameter symbol rating unit remarks min max ?h? level total maximum output current i oh ? ? 50 ma ?h? level total average output current i ohav ? ? 30 ma *2 power consumption p d ? 300 mw operating temperature t a ? 40 + 85 c storage temperature tstg ? 55 + 150 c
mb89560a series 30 2. recommended operating conditions ( av ss = v ss = 0.0 v ) * : these values depend on the operating conditions and th e analog assurance range. see figure ?operating voltage vs. main clock operating frequency (mb89567a, mb89567ac) ?, ?operating voltage vs. main clock operating frequency (mb89p568/mb89pv560) ? and ?6. a/d converter electrical characteristics.? parameter symbol value unit remarks min max power supply voltage v cc av cc 2.2* 5.5* v for mb89567a and mb89567ac 1.5 5.5 v retains the ram state in stop mode for mb89567a and mb89567ac 2.7* 5.5* v for mb89pv560 and mb89p568 1.5 5.5 v retains the ram state in stop mode for mb89pv560 and mb89p568 lcd power voltage v0 to v3 v ss v cc v liquid crystal power supply range : without booster (the best value is according to the specification of lcd used.) a/d converter reference input voltage avr 3.5 av cc v operating temperature t a ? 40 + 85 c
mb89560a series 31 ?operating voltage vs. main clock operating frequency (mb89567a, mb89567ac) and ?operating voltage vs. main clock operating frequency (mb89p568/mb89pv560) indicate the operating frequency of the external oscil- lator at an instruction cycle of 4/f ch 2.0 4.0 5.0 3.0 1.0 4.0 2.0 0.4 0.8 2.7 3.5 0.32 5.5 2.2 1.0 3.0 4.0 2.0 5.0 6.0 7.0 8.0 9.0 10.0 11.0 12.0 12.5 operating voltage (v) a/d converter accuracy assurance range: vcc = avcc =3.5 v to 5.5 v main clock operating freq. (mhz) operation assurance range min execution time (inst. cycle) ( s) operating voltage vs. main clock operating frequency (mb89567a, mb89567ac)
mb89560a series 32 since the operating voltage range is dependent on the instruction cycle, see minimum execution time if the operating speed is switched using a gear. warning: the recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. all of the device?s electric al characteristics are warranted when the device is operated within these ranges. always use semiconductor devices within their recommended operating condition ranges. operation outside these ranges may advers ely affect reliability and coul d result in device failure. no warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. users considering application outside the listed conditions are advised to contact their representatives beforehand. 2.0 3.0 2.5 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 4.0 2.0 0.4 0.8 3.5 12.0 11.0 12.5 0.32 2.7 2.2 4.0 4.5 5.0 5.5 operating voltage (v) a/d converter accuracy assurance range: vcc = avcc = 3.5 v to 5.5 v main clock operating freq. (mhz) operation assurance range min execution time (inst. cycle) ( s) operation assurance : t a = ? 10 c to + 55 c (only for mb89p568) operating voltage vs. main clock operating frequency (mb89p568/mb89pv560)
mb89560a series 33 3. dc characteristics (power supply voltage : 5.0v) (av cc = v cc = 5.0 v, av ss = v ss = 0.0 v, t a = ?40 c to +85 c) (continued) parameter symbol pin condition value unit remarks min typ max ?h? level input voltage v ih p00 to p07, p10 to p17, p20 to p27, p30 to p31, p40 to p45, p50 to p57, p60 to p67 ? 0.7 v cc ?v cc + 0.3 v cmos v ihs rst , moda, int10 to int17, int20 to int23, si,sck,ec1,uck, sck1,ui,si1,pwc ? 0.8 v cc ?v cc + 0.3 v hysteresis v ihsmb scl, sda ?v ss +1.4 ? v ss + 5.5 v smb input buffer selected v ihi2c ? 0.7 v cc ?v ss + 5.5 v i 2 c input buffer selected ?l? level input voltage v il p00 to p07, p10 to p17, p20 to p27, p30 to p31, p40 to p45, p50 to p57, p60 to p67 ?v ss ? 0.3 ? 0.3 v cc vcmos v ils rst , moda, int10 to int17, int20 to int23, si,sck,ec1,uck, sck1,ui,si1,pwc ?v ss ? 0.3 ? 0.2 v cc v hysteresis v ilsmb scl, sda ? v ss ? 0.3 ? v ss + 0.6 v smb input buffer selected v ili2c ?v ss ? 0.3 ? 0.3 v cc v i 2 c input buffer selected open-drain output pin application voltage v d p60 to p67, p50 to p57 ?v ss ? 0.3 ? v cc + 0.3 v resister ladder option p60 to p67, p50 to p57 ?v ss ? 0.3 ? v3 v lcd booster option p46, p47, p30, p31 ?v ss ? 0.3 ? v ss + 5.5 v ?h? level output voltage v oh p00 to p07, p10 to p17, p40 to p45 i oh = ?2.0 ma 4.0 ? ? v p20 to p27 i oh = ?15.0 ma 4.0 ? ?
mb89560a series 34 (av cc = v cc = 5.0 v, av ss = v ss = 0.0 v, t a = ?40 c to +85 c) (continued) parameter symbol pin condition value unit remarks min typ max ?l? level output voltage v ol p00 to p07, p10 to p17, p30, p31, p40 to p47, p50 to p57, p60 to p67, rst i ol = 4.0 ma ? ? 0.4 v p20 to p27 i ol = 15.0 ma ? ? 0.4 input leakage current (high-z output leakage current) i li p00 to p07, p10 to p17, p20 to p27, p40 to p45 0.0 v < v i < v cc ? 5? + 5 a without pull-up resistor p50 to p57, p60 to p67 ? 5? + 5 a resistor ladder option p50 to p57, p60 to p67 0.0 v < v i < v3 ? 5? + 5 a lcd booster option moda 0.0 v < v i < v cc ? 10 ? +10 a mb89pv560 mb89p568 open-drain output leakage current i liod p50 to p57, p60 to p67 0.0 v < v i < v cc ??+5 a resistor ladder option p50 to p57, p60 to p67 0.0 v < v i < v3 ? ? +5 a lcd booster option p30, p31, p46, p47 0.0 v < v i < v ss + 5.5 v ??+5 a pull-up resistance r pull p00 to p07, p10 to p17, p20 to p27, p40 to p45, rst v i = 0.0 v 25 50 100 k ? when pull-up resistor selected except rst pull-down resistance r moda moda v i = 3.0 v 50 100 200 k ? mb89567a/ mb89567ac power supply current * 1 i cc1 v cc f ch = 10 mhz, t inst *2 = 0.4 s, main clock run mode ?1520 ma mb89pv560 mb89p568 ?813 mb89567a mb89567ac i cc2 f ch = 10 mhz, t inst *2 = 6.4 s, main clock run mode ?58.5 ma mb89pv560 mb89p568 ?1 3 mb89567a mb89567ac i ccs1 f ch = 10 mhz, t inst *2 = 0.4 s, main clock sleep mode ?5 7 ma mb89pv560 mb89p568 ?2.5 5 mb89567a mb89567ac
mb89560a series 35 (continued) (av cc = v cc = 5.0 v, , av ss = v ss = 0.0 v, t a = ?40 c to +85 c ) *1 : the power supply current is measured at the external clock *2 : for information on t inst , see ?5. ac characteristics (4) instruction cycle.? note : for lcd and port multiplex pin (p 50 to p57, p60 to p67), please refer to lcd specification when the port is used, and refer to lcd specification when used as lcd pin. parameter symbol pin condition value unit remarks min typ max power supply current * 1 i ccs2 v cc f ch = 10 mhz, t inst *2 = 6.4 s, sleep mode ?1.5 3 ma mb89pv560 mb89p568 ?0.7 2 mb89567a mb89567ac i ccl f cl = 32.768 khz, subclock mode, t a = +25 c ?3 7ma mb89pv560 mb89p568 ?5085 a mb89567a mb89567ac i ccls f cl = 32.768 khz, subclock sleep mode, t a = +25 c ?3050 a mb89pv560 mb89p568 ?1530 mb89567a mb89567ac i cct f cl = 32.768 khz, t a = +25 c, watch mode, main clock stop mode ? 515 a mb89pv560 mb89p568 1.6 15 a mb89567a mb89567ac power supply current * 1 i cch v cc t a = +25 c, subclock stop mode ? 310 a mb89pv560 mb89p568 110 a mb89567a mb89567ac lcd divided resistance r lcd ? between v cc and v ss 300 500 750 k ? com0 to com3 output impedance r vcom com0 to com3 v1 to v3 = 5.0 v ?? 5k ? seg0 to seg23 output impedance r vseg seg0 to seg23 ? ? 15 k ? lcd controller/ driver leakage current i lcdl v0 to v3, com0 to com3, seg0 to seg23 ? ? 1? 1 a input capacitance c in other than av cc , av ss , v cc , and v ss f = 1 mhz ? 10 ? pf
mb89560a series 36 4. dc characteristics (power supply voltage : 3.0v) (av cc = v cc = 3.0v, av ss = v ss = 0.0 v, t a = ?40 c to +85 c) (continued) parameter symbol pin condition value unit remarks min typ max ?h? level input voltage v ih p00 to p07, p10 to p17, p20 to p27, p30 to p31, p40 to p45, p50 to p57, p60 to p67 ? 0.7 v cc ?v cc + 0.3 v cmos v ihs rst , moda, int10 to int17, int20 to int23 , si,sck,ec1,uck, sck1,ui,si1,pwc ? 0.8 v cc ?v cc + 0.3 v hysteresis v ihsmb scl, sda ?v ss +1.4 ? v ss + 5.5 v smb input buffer selected v ihi2c ? 0.7 v cc ?v ss + 5.5 v i 2 c input buffer selected ?l? level input voltage v il p00 to p07, p10 to p17, p20 to p27, p30 to p31, p40 to p45, p50 to p57, p60 to p67 ?v ss ? 0.3 ? 0.3 v cc vcmos v ils rst , moda, int10 to int17, int20 to int23, si,sck,ec1,uck, sck1,ui,si1,pwc ?v ss ? 0.3 ? 0.2 v cc v hysteresis v ilsmb scl, sda ?v ss - 0.3 ? v ss + 0.6 v smb input buffer selected v ili2c ?v ss ? 0.3 ? 0.3 v cc v i 2 c input buffer selected open-drain output pin application voltage v d p60 to p67, p50 to p57 ?v ss ? 0.3 ? v cc + 0.3 v resistor ladder option p60 to p67, p50 to p57 ?v ss ? 0.3 ? v3 v lcd booster option p46, p47, p30, p31 ?v ss ? 0.3 ? v ss + 5.5 v ?h? level output voltage v oh p00 to p07, p10 to p17, p40 to p45 i oh = ?2.0 ma 2.4 ? ? v p20 to p27 i oh = ?10 ma 2.4 ? ?
mb89560a series 37 (av cc = v cc = 3.0v, av ss = v ss = 0.0 v, t a = ?40 c to +85 c) (continued) parameter symbol pin condition value unit remarks min typ max ?l? level output voltage v ol p00 to p07, p10 to p17, p30, p31, p40 to p47, p50 to p57, p60 to p67, rst i ol = 4.0 ma ? ? 0.4 v p20 to p27 i ol = 10 ma ? ? 0.4 input leakage current (hi-z output leakage current) i li p00 to p07, p10 to p17, p20 to p27, p40 to p45 0.0 v < v i < v cc ?5 ? + 5 a without pull-up resister p50 to p57, p60 to p67 ?5 ? + 5 a resister ladder option p50 to p57, p60 to p67 0.0 v < v i < v3 ?5 ? + 5 a lcd booster option moda 0.0 v < v i < v cc ?10 ? +10 a mb89pv560 mb89p568 open-drain output leakage current i liod p50 to p57, p60 to p67 0.0 v < v i < v cc ??+5 a resister ladder option p50 to p57, p60 to p67 0.0 v < v i < v3 ? ? +5 a lcd booster option p30, p31, p46, p47 0.0 v < v i < v ss + 5.5 v ??+5 a pull-up resistance r pull p00 to p07, p10 to p17, p20 to p27, p40 to p45, rst v i = 0.0 v 50 100 200 k ? when pull-up resistor selected except rst pull-down resistance r moda moda v i = 5.0 v 25 50 100 k ? mb89567a mb89567ac power supply current * 1 i cc1 v cc f ch = 10 mhz, t inst *2 = 0.4 s, main clock run mode ?610 ma mb89pv560 mb89p568 ? 49 mb89567a mb89567ac i cc2 f ch = 10 mhz, t inst *2 = 6.4 s, main clock run mode ?1.5 3 ma mb89pv560 mb89p568 ? 0.4 2 mb89567a mb89567ac
mb89560a series 38 (continued) (av cc = v cc = 3.0 v, av ss = v ss = 0.0 v, t a = ?40 c to +85 c) *1 : the power supply current is measured at the external clock *2 : for information on t inst , see ?5. ac characteristics (4) instruction cycle.? note : for lcd and port multiplex pin (p 50 to p57, p60 to p67), please refer to lcd specification when the port is used, and refer to lcd specification when used as lcd pin. parameter symbol pin condition value unit remarks min typ max power supply current * 1 i ccs1 v cc f ch = 10 mhz, t inst *2 = 0.4 s, main clock sleep mode ?2 4 ma mb89pv560 mb89p568 ?1 3 mb89567a mb89567ac i ccs2 f ch = 10 mhz, t inst *2 = 6.4 s, main clock sleep mode ?1 2 ma mb89pv560 mb89p568 ?0.31.5 mb89567a mb89567ac i ccl f cl = 32.768 khz, subclock mode, t a = +25 c ?1 3ma mb89pv560 mb89p568 ?2560 a mb89567a mb89567ac i ccls f cl = 32.768 khz, subclock sleep mode , t a = +25 c ?1530 a mb89pv560 mb89p568 ?825 mb89567a mb89567ac i cct f cl = 32.768 khz, t a = +25 c, watch mode, main clock stop mode ? 515 a mb89pv560 mb89p568 114 a mb89567a mb89567ac i cch t a = +25 c, subclock stop mode ?1 5 a lcd divided resistance r lcd ? between v cc and v ss 300 500 750 k ? com0 to com3 output impedance r vcom com0 to com3 v1 to v3 = 3.0 v ?? 5k ? seg0 to 23 output impedance r vseg seg0 to seg23 ? ? 15 k ? lcd controller/ driver leakage current i lcdl v0 to v3, com0 to com3, seg0 to seg23 ??1?1 a input capacitance c in other than av cc , av ss , v cc , and v ss f = 1 mhz ? 10 ? pf
mb89560a series 39 5. ac characteristics (1) reset timing (v cc = 5.0 v, av ss = v ss = 0.0 v, t a = ? 40 c to + 85 c) notes : ? t hcyl is the oscillation cycle (1/f ch ) to input to the x0 pin. ? if the reset pulse applied to the external reset pin (rst ) does not meet the specifications, it may cause malfunctions. use caution so that th e reset pulse less than the specificat ions will not be fed to the external reset pin (rst ) . (2) power-on reset (av ss = v ss = 0.0 v, t a = ? 40 c to + 85 c) note : make sure that power supply rises wit hin the selected oscilla tion stabilization time. for example, when the main clock is operating at 10 mhz (f ch ) and the oscillation st abilization time select option has been set to 2 18 /f ch , the oscillation stabilizatio n delay time is 26.2 ms . therefore, the maximum value of power supply rising time is about 26.2 ms. rapid changes in power supply voltag e may cause a power-on reset. if power supply voltage needs to be varied in the course of operation, a smooth voltage rise is recommended. parameter symbol condition value unit remarks min max rst ?l? pulse width t zlzh ? 48 t hcyl ?ns parameter symbol condition value unit remarks min max power supply rising time t r ? 0.5 50 ms power supply cut-off time t off 1 ? ms due to repeated operations 0.2 v cc 0.2 v cc rst t zlzh 0.2 v 0.2 v 2.0 v 0.2 v t r v cc t off
mb89560a series 40 (3) clock timing (av ss = v ss = 0.0 v, t a = ?40 c to +85 c) parameter symbol pin value unit remarks min typ max clock frequency f ch x0, x1 1 ? 12.5 mhz main clock f cl x0a, x1a ? 32.768 ? khz subclock clock cycle time t hcyl x0, x1 80 ? 1000 ns main clock t lcyl x0a, x1a ? 30.5 ? s subclock input clock pulse width p wh p wl x0 20 ? ? ns external clock input clock rising/falling time t cr t cf x0 ? ? 10 ns external clock p wh 0.2 v cc x0 0.2v cc x0 x1 x0 x1 0.2 v cc 0.8 v cc 0.8 v cc t cr t cf t hcyl p wl f ch f ch c1 c2 open x0 and x1 timing and conditions main clock conditions when using a crystal oscillator or ceramic oscillator when using an external clock
mb89560a series 41 (4) instruction cycle (av ss = v ss = 0.0 v, t a = ?40 c to +85 c) parameter symbol value unit remarks instruction cycle (minimum execution time) t inst 4/f ch , 8/f ch , 16/f ch , 64/f ch s t inst = 0.32 s when operating at f ch = 12.5 mhz (4/f ch ) 2/f cl s t inst = 61.036 s when operating at f cl = 32.768 khz 0.3 v cc x0a 0.3 v cc 0.3 v cc 0.7 v cc 0.7 v cc t lcyl x0a x1a c 1 c 2 f cl x0a and x1a timing when using a crystal oscillator note : external clock is not available.
mb89560a series 42 (5) serial i/o timing (vcc = 5.0v, av ss = v ss = 0.0 v, t a = ?40 c to +85 c) * : for information on t inst , see ?(4) instruction cycle.? parameter symbol pin condition value unit remarks min max serial clock cycle time t scyc sck, sck1, uck internal shift clock mode 2 t inst *? s sck so time t slov sck, so, sck1, so1, uck, uo ?200 +200 ns valid si sck t ivsh si, sck, si1, sck1, ui, uck 200 ? ns sck valid si hold time t shix sck, si, sck1, si1, uck, ui 200 ? ns serial clock ?h? pulse width t shsl sck, sck1, uck external shift clock mode 1 t inst *? s serial clock ?l? pulse width t slsh 1 t inst *? s sck so time t slov sck, so, sck1, so1, uck, uo 0 200 ns valid si sck t ivsh si, sck, si1, sck1, ui, uck 200 ? ns sck valid si hold time t shix sck, si, sck1, si1, uck, ui 200 ? ns
mb89560a series 43 (6) peripheral input timing (vcc = 5.0v, av ss = v ss = 0.0 v, t a = ?40 c to +85 c) * : for information on t inst, see ?(4) instruction cycle.? parameter symbol pin condition value unit remarks min max peripheral input ?h? pulse width 1 t ilih1 int10 to int17, int20 to int23, ec, pwc ? 2 t inst *? s peripheral input ?l? pulse width 1 t ihil1 2 t inst *? s t scyc t slov t shix t ivsh sck sck1 uck 0.8 v cc 0.2 v cc 0.2 v cc 0.8 v cc 0.2 v cc 0.8 v cc 0.2 v cc 0.8 v cc 0.2 v cc so so1 uo si si1 ui t slsh t slov t shix t ivsh sck sck1 uck 0.8 v cc 0.2 v cc 0.8v cc 0.2 v cc 0.8 v cc 0.2 v cc 0.8 v cc 0.2 v cc so so1 uo si si1 ui 0.2 v cc t shsl 0.8 v cc internal shift clock mode external shift clock mode 0.2 v cc 0. 8 v cc t ihil1 0. 8 v cc 0.2 v cc t ilih1 int10 int17, int20 int2 3 , ec,pwc
mb89560a series 44 (7) i 2 c timing (vcc = 5.0 v, av ss = v ss = 0.0 v, t a = ?40 c to +85 c) *1 : for information in t inst , see " (4) instruction cycle". *2 : m is defined in the iccr cs4 and cs3 (bit 4 to bit 3) . for details, please refer to the h/w manual register explanation. *3 : n is defined in the iccr cs2 to cs0 (bit 2 to bit 0) . *4 : when the interrupt period is greater than scl "l" width, sda and scl output (standard) value is based on hypothesis when rising time is 0 ns. parameter symbol pin condition value unit remarks min max start condition output t sta scl sda ? 1/4 t inst * 1 m* 2 x n* 3 - 20 1/4 t inst m* 2 x n* 3 + 20 ns master mode stop condition output t sto scl sda ? 1/4 t inst (m* 2 n* 3 + 8) - 20 1/4 t inst (m* 2 n* 3 + 8) + 20 ns master mode start condition detect t sta scl sda ? 1/4 t inst 6 + 40 ? ns stop condition detect t sto scl sda ? 1/4 t inst 6 + 40 ? ns re-start condition output t stasu scl sda ? 1/4 t inst (m* 2 n* 3 + 8) - 20 1/4 t inst (m* 2 n* 3 + 8) + 20 ns master mode re-start condition detect t stasu scl sda ? 1/4 t inst 4 + 40 ? ns scl output low width t low scl ? 1/4 t inst m* 2 n* 3 - 20 1/4 t inst m* 2 n* 3 + 20 ns master mode scl output high width t high scl ? 1/4 t inst (m* 2 n* 3 + 8) - 20 1/4 t inst (m* 2 n* 3 + 8) + 20 ns master mode sda output delay t do sda ? 1/4 t inst 4 - 20 1/4 t inst 4 + 20 ns sda output setup time after interrupt t dosu sda ? 1/4 t inst 4 - 20 ? ns *4 scl input low pulse width t low scl ? 1/4 t inst 6 + 40 ? ns scl input high pulse width t high scl ? 1/4 t inst 2 + 40 ? ns sda input setup time t su sda ? 40 ? ns sda hold time t ho sda ? 0 ? ns
mb89560a series 45 ack ack t do t do t ho t do t do t dosu t dosu t su t su t ho t ho t sto t sta t stasu t high t low t low 9 9 8 7 6 1 sda sda scl scl data transmit (master/slave) data receive (master/slave)
mb89560a series 46 6. a/d converter electrical characteristics (1) for mb89567a/ac a/d converter (avcc = 2.7 v to 5.5 v, av ss = v ss = 0.0 v, t a = ?40 c to +85 c) *1 : for information on t inst , see ?(4) instruction cycle? in ?5. ac characteristics.? *2 : when a/d conversion is not in operation, and the cpu is in stop mode. *3 : included sampling time parameter symbol pin condition value unit remarks min typ max resolution ? ? ???10bit 1lsb = avr/1024 total error avr=av cc ?? 3.0 lsb non-linearity error ? ? 2.5 lsb differential linearity error ?? 1.9 lsb zero transition voltage v ot avss ? 1.5 lsb avss + 0.5 lsb avss + 2.5 lsb mv full-scale transition voltage v fst avr ? 3.5 lsb avr ? 1.5 lsb avr + 1.5 lsb mv interchannel disparity ? ? ? 4 lsb 1lsb = avr/1024 a/d mode conversion time * 3 ? ?60 t inst * 1 ? s a/d sampling time ?16 t inst * 1 ? analog port input current i ain an0 to an7 ??10 a analog input voltage v ain avss ? avr v power supply current i a av cc ??46ma when a/d conversion is activated i ah t a = +25 c?1 5 a when a/d conversion is stopped reference voltage ? avr ? avss+3.5 ? av cc v reference voltage supply current i r a/d is activated ? 200 ? a i rh a/d is stopped ? ? 5 a*2
mb89560a series 47 (2) for mb89p568/pv560 a/d converter (avcc=3.5 v to 5.5 v, av ss = v ss = 0.0 v, t a = ?40 c to +85 c) *1 : for information on t inst , see ?(4) instruction cycle? in ?5. ac characteristics.? *2 : when a/d conversion is not in operation, and the cpu is in stop mode. *3 : included sampling time parameter symbol pin condition value unit remarks min typ max resolution ? ? ???10bit 1lsb = avr/1024 total error avr=av cc ?? 3 . 0lsb non-linearity error ? ? 2.5 lsb differential linearity error ?? 1.9 lsb zero transition voltage v ot avss ? 1.5 lsb avss + 0.5 lsb avss + 2.5 lsb mv full-scale transition voltage v fst avr ? 3.5 lsb avr ? 1.5 lsb avr + 1.5 lsb mv interchannel disparity ? ??4lsb 1lsb = avr/1024 a/d mode conversion time * 3 ? ?60 t inst * 1 ? s a/d sampling time ? 16 t inst * 1 ? analog port input cur- rent i ain an0 to an7 ??10 a analog input voltage v ain avss ? avr v power supply current i a av cc ??46ma when a/d conversion is activated i ah t a = +25 c? 15 a when a/d conversion is stopped reference voltage ? avr ? avss + 3.5 ? av cc v reference voltage supply current i r a/d is activated ?400? a i rh a/d is stopped ??5 a*2
mb89560a series 48 (3) a/d converter glossary resolution analog changes that are identifiable with the a/d converter. linearity error the deviation of the straight line connecting the zero transition point (?00 0000 0000? ? ?00 0000 0001?) with the full-scale transition point (?11 1111 1110? ? ?11 1111 1111?) from actual conversion characteristics differential linearity error the deviation of input voltage needed to change the output code by 1 lsb from the theoretical value total error (unit: lsb) the difference between theoretical and ac tual conversion values caused by the zero transition error, full-scale transition error, linearity error, quantization error, and noise (continued) 0.5 lsb 1 lsb av ss 1.5 lsb 3ff 3fe 3fd 004 003 002 001 avr av ss v nt 3ff 3fe 3fd 004 003 002 001 avr { 1 lsb n + 0.5 lsb } v fst v ot v nt ? { 1 lsb n + 0.5 lsb } 1 lsb 1 lsb = v fst ? v ot 1022 (v) theoretical i/o characteristics total error digital output digital output analog input analog input total error for digital output n = actual conversion characteristic actual conversion characteristic theoretical conversion characteristic
mb89560a series 49 (continued) av ss 3ff 3fe 3fd 004 003 002 001 avr av ss v nt v (n + 1)t n + 1 n n ? 1 n ? 2 avr v nt v ot { 1 lsb n + v ot } v fst av ss 004 003 002 001 avr v ot v fst 3ff 3fe 3fd 3fc vnt ? { 1 lsb n + 0.5 lsb } 1 lsb v (n + 1 ) t ? vnt 1 lsb ? 1 zero transition error full-scale transition error digital output digital output actual conversion characteristic actual conversion characteristic actual conversion characteristics actual conversion characteristic (actual measured value) theoretical characteristic (actual measured value) linearity error differential linearity error digital output digital output analog input analog input actual conversion characteristic theoretical characteristic (actual measured value) (actual measured value) actual conversion characteristic actual conversion characteristic (actual measured value) actual conversion characteristic linearity error in digital output n = differential linearity erro r in digital output n =
mb89560a series 50 (4) precautions the smaller the | avr?av ss | is, the greater the error would become relatively. the output impedance of the external circuit for the analog input must satisfy the following conditions : output impedance of the external circuit < approx. 10 k ? if the output impedance of the external circuit is too high, an analog voltage sampling time might be insufficient. * : the value of r and c at the sample hold circuit depends on the following. mb89567a/mb89567ac : r : = 2.2 k ? , c : = 45 pf mb89p568/mb89pv560 : r : = 1.4 k ? , c : = 64 pf sample hold circuit * c = 45 pf analog channel selector close for 8 instruction cycles after starting a/d conversion. if the analog input impedance is higher than 10 k ? , it is recommended to connect an external capacitor of approx. 0.1 f. analog input pin comparator r = 2.2 k ? . . . . analog input equivalent circuit
mb89560a series 51 example characteristics (1) ?l? level output voltage (2) ?h? level output voltage v cc - v ol1 vs. i ol 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 0 2 4 6 8 101214161820 i ol (ma) v cc - v ol1 (v) v cc = 2.5 v v cc = 3.0 v v cc = 4.5 v v cc = 4.0 v v cc = 3.5 v v cc = 5.0 v v cc = 5.5 v v cc = 6.0 v v cc = 6.5 v v cc - v oh1 vs. i oh 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 -10 -8 -6 -4 -2 0 i oh (ma) v cc - v oh1 (v) v cc = 4.0 v v cc = 4.5 v v cc = 5.0 v v cc = 5.5 v v cc = 6.0 v v cc = 6.5 v v cc = 3.5 v
mb89560a series 52 (3) ?h? level input voltage / ?l? level input voltage 1234567 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 v cc (v) v in (v) t a = + 25 c cmos input 1234567 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 v ihs v ils v cc (v) v in (v) t a = + 25 c hysteresis input v ihs : threshold when inpu t voltage in hysteresis characteristics is set to ?h? level. v ils : threshold when inpu t voltage in hysteresis characteristics is set to ?l? level.
mb89560a series 53 (4) power supply current (external clock) (continued) i cct vs. v cc 0.0 0.4 0.8 1.2 1.6 2.0 2.4 2.8 3.2 3.6 4.0 01234567 v cc (v) i cct ( a) f cl = 32.768 khz t a = + 25 c i ccl vs. v cc 0 20 40 60 80 100 01234567 v cc (v) i ccl ( a) f cl = 32.768 khz t a = + 25 c i ccs2 vs. v cc 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 01234567 v cc (v) i ccs2 (ma) f ch = 12.5 mhz f ch = 10.0 mhz f ch = 4.2 mhz f ch = 3.0 mhz f ch = 1.0 mhz t a = + 25 c i cc2 vs. v cc 0.0 0.2 0.4 0.6 0.8 1.0 1.2 01234567 v cc (v) i cc2 (ma) f ch = 12.5 mhz f ch = 10.0 mhz f ch = 4.2 mhz f ch = 3.0 mhz f ch = 1.0 mhz t a = + 25 c i ccs1 vs. v cc 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 01234567 v cc (v) i ccs1 (ma) f ch = 12.5 mhz f ch = 10.0 mhz f ch = 4.2 mhz f ch = 3.0 mhz f ch = 1.0 mhz t a = + 25 c i cc1 vs. v cc 0 3 6 9 12 15 01234567 v cc (v) i cc1 (ma) f ch = 12.5 mhz f ch = 10.0 mhz f ch = 4.2 mhz f ch = 3.0 mhz f ch = 1.0 mhz t a = + 25 c (mask rom products) (mask rom products) (mask rom products) (mask rom products) (mask rom products) (mask rom products)
mb89560a series 54 (continued) (5) pull-up resistance ir vs. avr 0 20 40 60 80 100 120 140 160 180 200 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 avr (v) ir ( a) t a = + 25 c i ccls vs. v cc 0 2 4 6 8 10 12 14 16 18 20 22 01234567 v cc (v) i ccls ( a) t a = + 25 c i a vs. av cc 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 av cc (v) i a (ma) f ch = 10.0 mhz t a = + 25 c (mask rom products) rpull vs.v cc 10 30 50 70 90 110 130 150 170 190 210 2345678 v cc (v) rpull (k ? ) t a = + 93 c t a = + 25 c t a = ? 40 c
mb89560a series 55 mask options ordering information no. model mb89567a mb89567ac mb89p568 mb89pv560 specification method specify when ordering mask. setting unavailable. setting unavailable. 1 main clock oscillation stabilization delay time initial value* selection (f ch = 10 mhz) 01: 2 14 /f ch (approx. 1.6 ms) 10: 2 17 /f ch (approx. 13.1 ms) 11: 2 18 /f ch (approx. 26.2 ms) selectable 2 18 /f ch (approx. 26.2 ms) 2 18 /f ch (approx. 26.2 ms) 2 lcd driving power supply on-chip voltage booster internal voltage divider (external divider resistors can be used) selectable -101 internal voltage divider -102 on-chip voltage booster -101 internal voltage divider -102 on-chip voltage booster part number package remarks mb89567apfv mb89567acpfv mb89p568pfv-101 80-pin plastic lqfp (fpt-80p-m05) without booster resistor divider mb89567apfv mb89567acpfv mb89p568pfv-102 with booster mb89567apf mb89567acpf mb89p568pf-101 80-pin plastic qfp (fpt-80p-m06) without booster resistor divider mb89567apf mb89567acpf mb89p568pf-102 with booster mb89567apfm mb89567acpfm mb89p568pfm-101 80-pin plastic lqfp (fpt-80p-m11) without booster resistor divider mb89567apfm mb89567acpfm mb89p568pfm-102 with booster mb89pv560cf-101 80-pin ceramic mqfp (mqp-80c-p01) without booster resistor divider MB89PV560CF-102 with booster
mb89560a series 56 package dimensions (continued) 80-pin plastic lqfp (fpt-80p-m05) *pins width and pins thickness include plating thickness. dimensions in mm (inches) c 2000 fujitsu limited f80008s-c-3-7 120 40 21 60 41 80 61 index 12.000.10(.472.004)sq 14.000.20(.551.008)sq 0.50(.020) 0.200.05 (.008.002) m 0.08(.003) 0.1450.055 (.006.002) 0.08(.003) "a" 0~8 .059 ?.004 +.008 ?0.10 +0.20 1.50 0.500.20 (.020.008) 0.600.15 (.024.006) 0.100.10 (.004.004) (stand off) 0.25(.010) details of "a" part lead no. (mounting height)
mb89560a series 57 (continued) 80-pin plastic qfp (fpt-80p-m06) *pins width and pins thickness include plating thickness. dimensions in mm (inches) c 2001 fujitsu limited f80010s-c-4-4 1 24 25 40 41 64 65 80 20.000.20(.787.008) 23.900.40(.941.016) 14.000.20 (.551.008) 17.900.40 (.705.016) index 0.80(.031) 0.370.05 (.015.002) m 0.20(.008) "a" 0.170.06 (.007.002) 0.10(.004) 0.800.20 (.031.008) 0.880.15 (.035.006) 0~8 .120 ?.008 +.012 ?0.20 +0.30 3.05 0.25(.010) 0.30 +0.10 ?0.25 +.004 ?.010 .012 (stand off) details of "a" part (mounting height)
mb89560a series 58 (continued) 80-pin plastic lqfp (fpt-80p-m11) *pins width and pins thickness include plating thickness. dimensions in mm (inches) c 2001 fujitsu limited f80016s-c-2-5 120 21 40 61 80 41 60 14.000.10(.551.004)sq 16.000.20(.630.008)sq index 0.65(.026) 0.320.05 (.013.002) m 0.13(.005) "a" (.006.002) 0.1450.055 0.10(.004) 0.500.20 (.020.008) 0.600.15 (.024.006) 0~8 .059 ?.004 +.008 ?0.10 +0.20 1.50 (mounting height) 0.25(.010) 0.100.10 (.004.004) (stand off) details of "a" part
mb89560a series 59 (continued) 80-pin ceramic (mqp-80c-p01) dimensions in mm (inches) c 1994 fujitsu limited m80001sc-4-2 15.580.20 (.613.008) 16.300.33 (.642.013) 18.70(.736)typ index area 0.30(.012) typ 1.270.13 (.050.005) 22.300.33 (.878.013) 24.70(.972) typ 10.16(.400) typ 12.02(.473) typ 14.22(.560) typ 18.120.20 (.713.008) 1.270.13 (.050.005) 0.30(.012)typ 7.62(.300)typ 9.48(.373)typ 11.68(.460)typ 0.150.05 (.006.002) 8.70(.343) max 0.400.10 (.016.004) .047 ?.008 +.016 ?0.20 +0.40 1.20 0.400.10 (.016.004) 18.40(.724) ref 0.800.25 (.0315.010) 12.00(.472)typ .047 ?.008 +.016 ?0.20 +0.40 1.20 0.800.25 (.0315.010) 1.50(.059) typ 1.00(.040) typ 1.00(.040)typ 1.50(.059)typ index area 6.00(.236) typ 4.50(.177) typ index
fujitsu microelectronics limited shinjuku dai-ichi seimei bldg. 7-1, nishishinjuku 2-chome, shinjuku-ku, tokyo 163-0722, japan tel: +81-3-5322-3347 fax: +81-3-5322-3387 http://jp.fujitsu.com/fml/en/ for further information please contact: north and south america fujitsu microelectronics america, inc. 1250 e. arques avenue, m/s 333 sunnyvale, ca 94085-5401, u.s.a. tel: +1-408-737-5600 fax: +1-408-737-5999 http://www.fma.fujitsu.com/ europe fujitsu microelectronics europe gmbh pittlerstrasse 47, 63225 langen, germany tel: +49-6103-690-0 fax: +49-6103-690-122 http://emea.fujitsu.com/microelectronics/ korea fujitsu microelectronics korea ltd. 206 kosmo tower, 1002 daechi-dong, kangnam-gu,seoul 135-280 korea tel: +82-2-3484-7100 fax: +82-2-3484-7111 http://www.fmk.fujitsu.com/ asia pacific fujitsu microelectronics asia pte ltd. 151 lorong chuan, #05-08 new tech park, singapore 556741 tel: +65-6281-0770 fax: +65-6281-0220 http://www.fujitsu.com/sg/services/micro/semiconductor/ fujitsu microelectronics shanghai co., ltd. rm.3102, bund center, no.222 yan an road(e), shanghai 200002, china tel: +86-21-6335-1560 fax: +86-21-6335-1605 http://cn.fujitsu.com/fmc/ fujitsu microelectronics pacific asia ltd. 10/f., world commerce centre, 11 canton road tsimshatsui, kowloon hong kong tel: +852-2377-0226 fax: +852-2376-3269 http://cn.fujitsu.com/fmc/tw all rights reserved. the contents of this document are subject to change without notice. customers are advised to consult with sales representative s before ordering. the information, such as descri ptions of function and applicati on circuit examples, in this docum ent are presented solely for t he purpose of reference to show examples of ope rations and uses of fujits u microelectronics device; fujitsu microelectronics does not warrant proper operation of the device with respect to use based on such information. when you develop equipment incor porat- ing the device based on such in formation, you must assume any responsibility arising out of such use of the information. fujitsu microelectronics assumes no liab ility for any damages whatsoever arisi ng out of the use of the information. any information in this document, including descriptions of function and schematic di agrams, shall not be construed as license of the use or exercise of any intellectual property ri ght, such as patent right or copyright, or any other right of fujitsu microelectroni cs or any third party or does fujitsu microel ectronics warrant non-infringeme nt of any third-party's intellectual property right o r other right by using such information. fu jitsu microelectronics assumes no liability for any infringement of the intellectual property rights or other rights of third parties which w ould result from the use of in formation cont ained herein. the products described in this document are designed, developed and manufa ctured as contemplated fo r general use, including wit hout limitation, ordinary indus trial use, general office use, personal use, and household use, but are not designed, developed and m anufactured as contemplated (1) for use acco mpanying fatal risks or dangers th at, unless extremely high safety is secured, could have a ser ious effect to the public, and could lead directly to death, personal injury, severe physical damage or other lo ss (i.e., nuc lear reaction control in nuclear facility, airc raft flight control, air traffic c ontrol, mass transport control, me dical life support system, missile la unch control in weapon system), or (2) for use requiring extremely high re liability (i.e ., submersible repeater and artificial satellite). please note that fujitsu microelectronics will not be liable against you and/or any th ird party for any clai ms or damages arisi ng in connection with above-men tioned uses of the products. any semiconductor devices have an inherent ch ance of failure. you must protect against injury, damage or loss from such failure s by incorporating safety desi gn measures into your facility and equipment such as redundancy, fire protection, and prevention of ov er-current levels and other abnor mal operating conditions. exportation/release of any products described in this docum ent may require necessary procedures in accordance with the regulati ons of the foreign exchange and foreign trade control law of japan and/or us export control laws. the company names and brand na mes herein are the trademarks or registered trademarks of their respective owners. edited strategic business development dept.

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